Layout method and preparation method of semiconductor circuit
The invention provides a layout method and a preparation method of a semiconductor circuit. In the layout method, the process parameters of the first isolation groove at the first side of the contact hole are adjusted according to the process parameters of the contact hole, so that the first isolati...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a layout method and a preparation method of a semiconductor circuit. In the layout method, the process parameters of the first isolation groove at the first side of the contact hole are adjusted according to the process parameters of the contact hole, so that the first isolation groove is transversely expanded out of the contact hole from the contact hole, and the isolation range of the first isolation groove can better cover the vertex angle position of the contact hole; the problem of short circuit between the contact plug in the contact hole and the adjacent interconnection line is avoided, and the process window aiming at the circuit layout is effectively improved.
本发明提供了一种半导体线路的布局方法及制备方法。在该布局方法中,其根据接触孔的工艺参数调整接触孔第一侧的第一隔离槽的工艺参数,以使该第一隔离槽从接触孔横向扩至接触孔之外,从而使得第一隔离槽的隔离范围可以更好的覆盖接触孔的顶角位置,避免了接触孔内的接触插塞和邻近的互连线短接的问题,有效提高针对该电路布局的工艺窗口。 |
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