Chip reliability test method and device and chip equipment

The invention relates to a chip reliability test method and device and chip equipment, and the method comprises the steps: firstly, transmitting a test sequence to a tested function logic of a chip, then obtaining a pulse signal according to a reference signal and an output value of the tested function logic, converting the change process of a time sequence into time delay change of comparing the reference signal with the output value of the tested function logic, and then transmitting the pulse signal to a delay chain of the chip to obtain a delay value of the pulse signal in the delay chain, measuring time delay change by adopting a delay link mode, and judging that the chip is reliable when the delay value of the test sequence is smaller than or equal to a preset delay threshold value. According to the method, on-chip resources of the chip are utilized, few external resources are needed, the application effect is good, a high-precision delay chain structure is adopted in the testing process, the testing re