Semiconductor structure and preparation method thereof, and three-dimensional memory

The invention provides a semiconductor structure and a preparation method thereof, and a three-dimensional memory, relates to the technical field of semiconductor chips, and aims to reduce the risk of high resistance or open circuit caused by etching of a grid line layer. The preparation method of the semiconductor structure comprises the following steps: preparing an intermediate semiconductor structure; removing the sacrificial layer through the grid line gap to form a first grid line cavity; forming a first sub-grid line layer covering the inner wall of the first grid line cavity; a second grid line cavity is defined by the first sub grid line layer, and the thickness of the end, close to the grid line gap, of the second grid line cavity is larger than that of the end, away from the grid line gap, of the second grid line cavity; forming a second sub-grid line layer in the second grid line cavity; the thickness of the end portion, close to the grid line gap, of the second sub-grid line layer is larger than