Chip package, electronic equipment and chip package preparation method

A chip package, an electronic device and a chip package manufacturing method, the chip package comprises a substrate, a first bare chip, a second bare chip and a beam structure, the first bare chip and the second bare chip are arranged on one side of the substrate side by side and electrically connected with the substrate. The cross beam structure is arranged between the first bare chip and the second bare chip, a first end of the cross beam structure is stacked and fixedly connected with a part of the first bare chip, a second end of the cross beam structure is stacked and fixedly connected with a part of the second bare chip, and the cross beam structure is in insulated connection with the first bare chip and the second bare chip. The thermal expansion coefficient of the cross beam structure is smaller than that of the substrate, so that when the substrate is mechanically deformed due to thermal expansion and the like, the mechanical deformation degree of the cross beam structure is small, and the change of