Clock signal generation

Embodiments of the present disclosure relate to clock signal generation. An apparatus for generating first clock signals includes first circuits each including a ring oscillator that transmits one of the first clock signals and is connected to a first node configured to receive a first current. The circuit selects one of the first clock signals, and the phase-locked loop transmits a second signal that is a function of a difference between a frequency of the selected first clock signal and a setpoint frequency. When the first circuits transmit a selected clock signal and operate in a controlled mode, each first circuit provides a compensation current determined by a second signal to the first node. 本公开的实施例涉及时钟信号生成。用于生成第一时钟信号的设备包括第一电路，第一电路各自包括环形振荡器，环形振荡器传送第一时钟信号中的一个第一时钟信号并且被连接到被配置为接收第一电流的第一节点。电路选择第一时钟信号中的一个第一时钟信号，并且锁相环传送第二信号，第二信号是在选择的第一时钟信号的频率与设定点频率之间的差的函数。当第一电路传送选定时钟信号并且在受控模式下操作时，每个第一电路向第一节点提供由第二信号确定的补偿电流。