Low-delay phase offset recovery circuit based on Cartesian coordinate and polar coordinate fusion

The invention belongs to the technical field of coherent optical fiber communication, and particularly relates to a low-delay phase offset recovery circuit based on Cartesian coordinate and polar coordinate fusion. The CPR is realized by adopting a VV4E algorithm, and the corresponding circuit structure consists of a phase denoising module, a phase correction module, a phase unwrapping module, a coordinate mapping module and a phase multiplication module. Calculation is executed in Cartesian coordinates, so that the calculation complexity is reduced; the phase offset is calculated by CORDIC of six rotations, and the phase unwrapping is divided into hysteresis addition and phase counting, with a lookup table for storing triangular coefficients to reduce latency. When the circuit is evaluated on a Xilinx ZCU102 FPGA platform, the clock frequency can reach 370 MHz, and the delay for processing 29.6 GBd QPSK signals is 22 cycles and is the minimum value. The real-time circuit provided by the invention can provide