Transistor layout with reduced flicker noise
A transistor includes: a diffusion region including a drain, a source, and a channel between the drain and the source; an isolation region surrounding the diffusion region for electrically isolating the transistor; the grid polycrystalline silicon is overlapped with at least one part of the channel,...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A transistor includes: a diffusion region including a drain, a source, and a channel between the drain and the source; an isolation region surrounding the diffusion region for electrically isolating the transistor; the grid polycrystalline silicon is overlapped with at least one part of the channel, and the diffusion region transversely extends to exceed the grid polycrystalline silicon in the width direction of the channel.
一种晶体管包括:扩散区,包括漏极、源极、以及在漏极与源极之间的沟道;围绕扩散区的隔离区,以用于电隔离晶体管;以及栅极多晶硅,与沟道的至少一部分重叠,其中,扩散区沿沟道宽度方向横向延伸超过栅极多晶硅。 |
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