Circuit and related chip

The invention provides a circuit and a related chip. The circuit is coupled to a memory, and comprises a first scan flip-flop which is a previous-stage scan flip-flop of an input end of the memory, and an output end of the first scan flip-flop is coupled to the input end of the memory; and a second scan flip-flop which is a post-stage scan flip-flop of the output end of the memory, and the input end of which is coupled to the output end of the memory. Wherein the circuit has a loading stage and a capturing stage in a scanning mode, in the capturing stage, data output by the output end of the first scanning flip-flop returns to the data input end of the first scanning flip-flop through a first loop, and the first loop does not pass through the second scanning flip-flop. 本发明提出一种电路和相关芯片。该电路耦接于存储器，该电路包括：第一扫描触发器，是该存储器的输入端的前一级扫描触发器，其输出端耦接至该存储器的输入端；以及第二扫描触发器，是该存储器的输出端的后一级扫描触发器，其输入端耦接至该存储器的输出端；其中该电路在扫描模式下，具有载入阶段和捕获阶段，在该捕获阶段，该第一扫描触发器的输出端所输出的数据通过第一回路回到该第一扫描触发器的数据输入端，且该第一回路不经过该第二扫描触发器。