Integrated chip and method of manufacturing integrated chip

Various embodiments of the invention are directed to an integrated chip. The integrated chip includes a semiconductor substrate having a device substrate overlying a process substrate and an insulating layer disposed between the device substrate and the process substrate. A gate electrode is over the device substrate between the drain region and the source region. A conductive via extends through the device substrate and the insulating layer to contact the process substrate. A first isolation structure is disposed within the device substrate and includes a first isolation segment disposed laterally between the gate electrode and the conductive via. A contact region is disposed within the device substrate between the first isolation segment and the conductive via. A conductive gate electrode directly overlies the first isolation segment and is electrically coupled to the contact region. The embodiment of the invention also relates to a method for manufacturing the integrated chip. 本发明的各个实施例针对集成芯片。集成芯片包括：半导体衬底，