Rescheduling failed memory requests in processor

Apparatuses and techniques for rescheduling failed memory requests in a processor are described herein. When a memory request for a thread is rejected at a point other than a thread rescheduling point in the execution pipeline of the processor, the thread may be placed into a memory response path of...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: AMELIO JAIME, BARONE CHRISTIAN, WALKER, DONALD, E
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Apparatuses and techniques for rescheduling failed memory requests in a processor are described herein. When a memory request for a thread is rejected at a point other than a thread rescheduling point in the execution pipeline of the processor, the thread may be placed into a memory response path of the processor. An indicator may also be provided that register write-back will not occur for the thread. The thread may then be rescheduled with other threads in the memory response path. 本文中描述用于重新调度处理器中失败的存储器请求的装置和技术。当在所述处理器的所述执行流水线中线程重新调度点之外的点处拒绝对线程的存储器请求时,所述线程可放置到所述处理器的存储器响应路径中。也可提供对于所述线程将不会发生寄存器写回的指示符。接着,可用所述存储器响应路径中的其它线程重新调度所述线程。