Method for testing high-resistance failure of semiconductor device
The invention provides a semiconductor device high-resistance failure test method, which comprises the following steps: providing a test sample and a design layout thereof, and setting a path in which high resistance possibly exists in the test sample as a to-be-tested path; finding out two end poin...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a semiconductor device high-resistance failure test method, which comprises the following steps: providing a test sample and a design layout thereof, and setting a path in which high resistance possibly exists in the test sample as a to-be-tested path; finding out two end points of the to-be-tested path according to the design layout, and connecting the to-be-tested path to a test circuit; and performing an electrical test on the to-be-tested path, and judging whether the to-be-tested path has high resistance or not according to a test result of the electrical test. By setting the to-be-tested path of the semiconductor device and performing the electrical test on the to-be-tested path, whether the high-resistance failure exists in the to-be-tested path or not is accurately judged, and the test efficiency is improved.
本发明提供了一种半导体器件高阻失效的测试方法,包括:提供测试样品及其设计版图,将所述测试样品中可能存在高阻的路径设置为待测路径;根据所述设计版图找到所述待测路径的两个端点,并将所述待测路径接入一测试电路;以及,对所述待测路径进行电性测试,根据所述电性测试的测试结果判断所述待测路径是否存在高阻。本发明通过设置半导体器件的待测路径并对其进行电性测 |
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