Apparatus and method for cyclic redundancy calculation of semiconductor device

The invention relates to an apparatus and a method for cyclic redundancy calculation of a semiconductor device. Apparatuses and methods for data error verification of semiconductor devices are described. An example apparatus includes a plurality of data queue circuits and a CRC combinatorial circuit. The plurality of data queue circuits includes a plurality of CRC calculator circuits. The plurality of CRC calculator circuits includes one CRC calculator circuit. The CRC calculator circuit receives a plurality of data bits and one or more check bits, and further provides a plurality of CRC compute bits. The CRC combining circuit receives the plurality of CRC compute bits from the plurality of CRC calculator circuits and further provides a resulting signal in response at least in part to the plurality of CRC compute bits. 本公开涉及用于半导体装置的循环冗余计算的设备和方法。描述了用于半导体装置的数据错误校验的设备和方法。实例性设备包含多个数据队列电路和CRC组合电路。所述多个数据队列电路包含多个CRC计算器电路。所述多个CRC计算器电路包含一个CRC计算器电路。所述CRC计算器电路接收多个数据位和一或多个校验位，并且进一步提供多个CRC计算位。所述CRC组合电路从所述多个CRC计算器电路接收所述多个C