Read interference checking method, memory storage device and control circuit unit
The invention provides a read interference checking method, a memory storage device and a memory control circuit unit. The method comprises the following steps of: updating a first reading frequency and a second reading frequency of a first entity unit group according to a total reading frequency of...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a read interference checking method, a memory storage device and a memory control circuit unit. The method comprises the following steps of: updating a first reading frequency and a second reading frequency of a first entity unit group according to a total reading frequency of reading operations executed on a plurality of entity programmed units in the first entity unit group; scanning at least one first entity programming unit in the currently read entity erasing unit to obtain a first error bit number in response to the judgment that the first reading frequency is greater than the first reading frequency threshold value; scanning all entity programming units in at least one first entity erasing unit in the first entity unit group to obtain a second error bit number in response to judging that the second reading number is greater than a second reading number threshold value; and performing a read interference prevention operation according to the first or second error bit number.
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