In-chip interference test method and in-chip interference test system

The invention provides a method for testing interference in a chip, which comprises the following steps of: establishing a testing environment, connecting an input end of a first low-noise amplifier to a first end of a first component, and connecting an output end of the first low-noise amplifier to a second detection channel port of a vector network analyzer; the input end of a second low-noise amplifier is connected to a first detection channel port of the vector network analyzer, and the output end of the second low-noise amplifier is connected to the first end of another second component; the signal control output end of the control equipment is connected to the signal control input end of the chip to be tested; power is supplied and work is started; an interference waveform image is obtained, the first low-noise amplifier and the second low-noise amplifier are turned on at the same time through the control equipment, and the S21 parameter waveform is displayed on the vector network analyzer. The embodime