Novel digital gate integrated circuit structure

The invention discloses a novel digital gate integrated circuit structure, and relates to a microelectronic technology and a semiconductor technology. The vertical MOS transistor is composed of at least two vertical MOS transistors which are arranged in parallel, each vertical MOS transistor comprises a drain region, a drift region, a channel region and a source region which are sequentially overlapped, a gate medium region surrounds the channel region, each vertical MOS transistor comprises at least one MOS transistor series connection group, and the MOS transistor series connection group is composed of a PMOS transistor and an NMOS transistor which are connected in series in the circuit relation; in the spatial structure relation, the PMOS transistors and the NMOS transistors in the same MOS transistor series group share the same gate electrode region; a drain region and a source region of the PMOS transistor are p + semiconductors, a drift region is a p-semiconductor, and a channel region is an n + semicon