Semiconductor structure, three-dimensional memory and manufacturing method thereof

The invention provides a three-dimensional memory and a manufacturing method thereof, and the method comprises the steps: forming a first stacking layer on a substrate, and defining a plurality of chip regions and cutting channel regions located between the adjacent chip regions in the first stacking layer; forming an opening of a zero-layer mark in the cutting channel region, wherein the opening has a first key size; and forming a bottom selection gate cut in the chip area, the bottom selection gate cut having a second critical dimension, the first critical dimension being greater than the second critical dimension. According to the three-dimensional memory manufacturing method provided by the invention, the bottom selection gate notch and the opening extending to the zero layer mark in the substrate can be formed through a one-time photoetching process, and the process flow is simplified. 本申请提供了一种三维存储器及其制造方法，该方法包括：在衬底上形成第一堆叠层，第一堆叠层中定义有多个芯片区域以及位于相邻的芯片区域之间的切割道区域；在切割道区域形成零层标记的开口，开口具有第一关键尺寸；以及在芯片区域形成底部选择栅切口，底部选