Single-processor double-Rapidio-node implementation method

The invention discloses a single-processor double-Rapidio-node implementation method. The method comprises the following steps of: 1, enabling a PowerPC processor to play roles of double Rapidio nodes; 2, configuring the ID of the double Rapidio nodes on the single processor; 3, enabling the double...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	WANG XIAOPENG, GUO HAO, ZHOU HAIBING, LIU DAIYANG, XU SHIJIE, GU SHENG
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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