Single-processor double-Rapidio-node implementation method

The invention discloses a single-processor double-Rapidio-node implementation method. The method comprises the following steps of: 1, enabling a PowerPC processor to play roles of double Rapidio nodes; 2, configuring the ID of the double Rapidio nodes on the single processor; 3, enabling the double Rapidio nodes on the single processor to identify each other; and 4, carrying out resource allocation of the double Rapidio nodes in the single processor. According to the invention, on the premise of ensuring the stability and reliability of the network, the early-stage design cost is greatly controlled and reduced, and meanwhile, the later-stage network management and maintenance are also facilitated. 本发明公开了一种单处理器双Rapidio节点的实现方法，包含以下步骤：步骤一、令一个PowerPC处理器扮演两个Rapidio节点的角色；步骤二、对单处理器上的双Rapidio节点的ID进行配置；步骤三、令单处理上的双Rapidio节点相互识别；步骤四、双Rapidio节点在单个处理器中的资源分配。本发明在保障网络稳定可靠的前提下，大幅度控制并降低前期设计成本，同时，也便利了后期网络管理以及维护。