Micro-power-consumption level flipping circuit and method for reducing transient current in circuit
The invention discloses a micro-power-consumption level flipping circuit and a method for reducing transient current in the circuit. The level flipping circuit comprises: a bias voltage generation module, which is connected with a power supply end and is used for providing bias voltage according to...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention discloses a micro-power-consumption level flipping circuit and a method for reducing transient current in the circuit. The level flipping circuit comprises: a bias voltage generation module, which is connected with a power supply end and is used for providing bias voltage according to input voltage; an output module, which is connected with the bias voltage generation module, receives the bias voltage and is used for generating output voltage and feedback voltage according to the bias voltage; and a current source module, which is arranged between and connected with the power supply end and the output module or between the output module and a grounding end, and is used for providing a protection current to limit a short-circuit current when the output module is short-circuited, wherein the level state of the output voltage is flipped when the voltage value of the input voltage changes and exceeds a threshold value. According to the invention, the short-circuit current in the circuit can be reduc |
---|