Techniques for determining memory cell read offsets
The application relates to techniques for determining memory cell read offsets, which are described to support determining voltage offsets and corresponding read voltage levels for one or more memory cell levels using a relationship between read voltage levels and voltage offsets. A memory device ma...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The application relates to techniques for determining memory cell read offsets, which are described to support determining voltage offsets and corresponding read voltage levels for one or more memory cell levels using a relationship between read voltage levels and voltage offsets. A memory device may estimate first voltage offsets using a first procedure and may perform a read operation using the first voltage offsets. If a first voltage offset results in a read error for a corresponding memory cell level, the memory device may determine an updated voltage offset using the relationship. The relationship may predict a voltage offset for a given read voltage level, such that the memory device may use the relationship to predict an updated voltage offset for a memory cell level. The memory device may use the updated voltage offset(s) to perform a second read operation for the one or more memory cells.
本申请案涉及用于确定存储器单元读取偏移的技术,其经描述以支持使用读取电压电平与电压偏移之间的关系来确定针对一或多个存储器单元电平的电压偏移及对应读取电压电平。存储器装置可使用第一程序估计第一电压偏移,并且可使用所述第一电压偏 |
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