Static random access memory element

The invention discloses a static random access memory element. The static random access memory element consists of two P-channel grids serving as loading transistors, two N-channel grids serving as driving transistors and two N-channel grids serving as access transistors in a memory cell. A first dummy gate electrically connected to a ground voltage via a metal layer and a second dummy gate electrically connected to the ground voltage via a metal layer are disposed near an N-channel gate as an access transistor spaced apart from each other by a bit line node, and the second dummy gate is disposed near the first dummy gate electrically connected to the ground voltage via a metal layer. The second dummy gate is symmetrical with one of the P channel gates as the loading transistor and the N channel gate as the driving transistor by taking the bit line node as a center. 本发明公开一种静态随机存取存储元件。此静态随机存取存储元件是由存储单元中两个作为载入晶体管的P通道栅极、两个作为驱动晶体管的N通道栅极、以及两个作为存取晶体管的N通道栅极所组成。作为存取晶体管的N通道栅极附近会设置一第一虚置栅极，该两者间隔有一位线节点，其中该第一虚置栅极是经由一金属层电连