Method for manufacturing static random access memory element

The invention discloses a method for manufacturing a static random access memory element. The method comprises the following steps: forming two P channel gates serving as loading transistors, two N channel gates serving as driving transistors and two N channel gates serving as access transistors on a memory unit; forming at least one first dummy gate on a dummy unit, wherein the first dummy gate is positioned on the substrate and is adjacent to one of the N-channel gates serving as the access transistor; forming a bit line node on the memory cell between the first dummy gate and the N-channel gate as the access transistor; forming a metal layer on the dummy unit and electrically connected to the first dummy gate and a ground voltage; forming a second dummy gate on the dummy unit, the second dummy gate being adjacent to the first dummy gate, and the second dummy gate being symmetrical with one of the P-channel gates serving as the loading transistor and the N-channel gate serving as the driving transistor by t