SYSTEM AND METHOD FOR FACILITATING EFFICIENT HOST MEMORY ACCESS FROM A NETWORK INTERFACE CONTROLLER (NIC)

A network interface controller (NIC) capable of efficient memory access is provided. The NIC can be equipped with an operation logic block, a signaling logic block, and a tracking logic block. The operation logic block can maintain an operation group associated with packets requesting an operation o...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HODGE HESS M, JOHNSON TIMOTHY J, GORODETSKY IGOR
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:A network interface controller (NIC) capable of efficient memory access is provided. The NIC can be equipped with an operation logic block, a signaling logic block, and a tracking logic block. The operation logic block can maintain an operation group associated with packets requesting an operation on a memory segment of a host device of the NIC. The signaling logic block can determine whether a packet associated with the operation group has arrived at or departed from the NIC. Furthermore, the tracking logic block can determine that a request for releasing the memory segment has been issued. The tracking logic block can then determine whether at least one packet associated with the operation group is under processing in the NIC. If no packet associated with the operation group is under processing in the NIC, tracking logic block can notify the host device that the memory segment can be released. 提供了一种能够进行高效存储器访问的网络接口控制器(NIC)。所述NIC可以配备有操作逻辑块、信令逻辑块和跟踪逻辑块。所述操作逻辑块可以维持与请求对所述NIC的主机设备的存储器段进行操作的包相关联的操作组。所述信令逻辑块可以确定与所