Integrated circuit and method for forming integrated circuit
The present disclosure discloses an integrated circuit having a plurality of dies stacked along a direction and a method of forming the integrated circuit. In one aspect, the integrated circuit includes a first die, a second die, and a third die stacked along one direction. In one aspect, the first...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The present disclosure discloses an integrated circuit having a plurality of dies stacked along a direction and a method of forming the integrated circuit. In one aspect, the integrated circuit includes a first die, a second die, and a third die stacked along one direction. In one aspect, the first die includes a first interface circuit for generating a signal. In one aspect, the second die includes a second interface circuit for receiving a signal from the first interface circuit and generating a replica signal of the signal. In one aspect, the third die includes a third interface circuit to receive the replica signal from the second interface circuit.
本揭示文件揭露了一种集成电路以及集成电路的形成方法,此集成电路具有多个沿着一个方向堆叠的裸晶。在一种态样中,集成电路包含沿着一个方向堆叠的第一裸晶、第二裸晶以及第三裸晶。在一种态样中,第一裸晶包含一个第一接口电路,用来产生信号。在一种态样中,第二裸晶包含一个第二接口电路,用来接收来自于第一接口电路的信号,以及产生此信号的复制信号。在一种态样中,第三裸晶包含一个第三接口电路,用来接收来自于第二接口电路的复制信号。 |
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