Configurable accurate delay circuit structure for high-speed ADC (Analog to Digital Converter)

The invention discloses a configurable accurate delay circuit structure for a high-speed ADC, and belongs to the field of electronic circuits, the configurable accurate delay circuit structure comprises a PMOS tube P1, an NMOS tube N1 and a capacitor CL, the gate end of the PMOS tube P1 and the gate...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	DONG YEMIN, WU XUFAN
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CODE CONVERSION IN GENERAL CODING DECODING ELECTRICITY
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