Preparation process of silicon substrate with insulating buried layer
The invention relates to a preparation process of a silicon substrate with an insulating buried layer. The preparation process comprises the following steps: preparing a polished silicon wafer as a device layer silicon substrate and an oxidized silicon wafer as a supporting silicon substrate, respec...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention relates to a preparation process of a silicon substrate with an insulating buried layer. The preparation process comprises the following steps: preparing a polished silicon wafer as a device layer silicon substrate and an oxidized silicon wafer as a supporting silicon substrate, respectively carrying out plasma surface activation treatment, carrying out low-temperature annealing after normal-temperature bonding, thinning to a target thickness by adopting mechanical grinding, then carrying out CMP treatment, and finally, carrying out high-temperature argon annealing treatment on the polished bonding wafer. The preparation process has the advantages that on the premise that the high-temperature thermal budget is not greatly increased by bonding the silicon wafer, the bonding strength is enhanced through a two-step annealing mode of low-temperature annealing and high-temperature argon annealing, and meanwhile, the extremely low primary particle defect density in the silicon substrate with the insul |
---|