P-channel LDMOS device with surface voltage-resistant structure and preparation method thereof
The invention relates to a p-channel LDMOS device with a surface voltage-resistant structure, and belongs to the technical field of semiconductors. A surface super-junction structure is provided for the p-channel LDMOS device, comb-finger-shaped n-type semiconductor strips are prepared on the surfac...
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Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a p-channel LDMOS device with a surface voltage-resistant structure, and belongs to the technical field of semiconductors. A surface super-junction structure is provided for the p-channel LDMOS device, comb-finger-shaped n-type semiconductor strips are prepared on the surface of a drift region of the device, the n-type semiconductor strips are electrically connected with a grid electrode, large-range depletion of a drift region channel can be achieved under the turn-off condition, the depletion region can tolerate a higher voltage, so the breakdown characteristic of the device is enhanced. On the other hand, compared with a traditional super junction, the comb-finger-shaped n-type surface voltage-withstanding structure is prepared on the surface of the drift region and does not need to be embedded into the drift region of the device, and the requirement for the technology is lowered. Meanwhile, as the comb-finger-shaped n-type surface voltage-withstanding structure connected with the |
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