DESKEWING METHOD FOR A PHYSICAL LAYER INTERFACE ON A MULTI-CHIP MODULE

Systems, apparatuses, and methods for implementing a deskewing method for a physical layer interface on a multi-chip module are disclosed. A circuit connected to a plurality of communication lanes trains each lane to synchronize a local clock of the lane with a corresponding global clock at a beginning of a timing window. Next, the circuit symbol rotates each lane by a single step responsive to determining that all of the plurality of lanes have an incorrect symbol alignment. Responsive to determining that some but not all of the plurality of lanes have a correct symbol alignment, the circuit symbol rotates lanes which have an incorrect symbol alignment by a single step. When the end of the timing window has been reached, the circuit symbol rotates lanes which have a correct symbol alignment and adjusts a phase of a corresponding global clock to compensate for missed symbol rotations. 公开了用于实施用于多芯片模块上的物理层接口的偏斜校正方法的系统、设备和方法。连接到多个通信通道的电路训练每个通道以在时序窗口的开始处使所述通道的本地时钟与对应全局时钟同步。接下来，响应于确定所有所述多个通道具有不正确的符号对齐，电路将每个通道符号旋转单