Chip mounting process capable for reducing stress

The invention provides a chip mounting process for reducing stress. The process comprises the following steps of S1, mounting a chip on the surface of a substrate through a surface mounting process, and performing reflow soldering to correspondingly connect each solder ball on the front surface of the chip with a bonding pad on the substrate, wherein the chip is provided with array type small chip units in advance; S2, filling the bottom of the chip with underfill glue, absorbing the liquid underfill glue to enter a gap between the chip and the substrate through the surface tension of the chip and the substrate, and then curing the underfill glue; S3, segmenting the back surface of the chip to form a groove, and segmenting the chip into the array type small chip units, wherein the small chip units realize the interconnection among the array type small chip units through the bonding pads and wires on the substrate. According to the invention, the chip is designed into an array structure, the chip is welded wit