Method for manufacturing semiconductor device and etching solution
The invention relates to a method for manufacturing a semiconductor device and an etching solution. In a wet etching process to pattern a metal layer such as a p-metal work function layer over a dielectric layer such as a high-k gate dielectric layer, a selectivity of the wet etching solution betwee...
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creator | LIN QUNNENG JIANG ZI'ANG LIAN JIANZHOU CHEN JIEWEI YE MINGXI |
description | The invention relates to a method for manufacturing a semiconductor device and an etching solution. In a wet etching process to pattern a metal layer such as a p-metal work function layer over a dielectric layer such as a high-k gate dielectric layer, a selectivity of the wet etching solution between the metal layer and the dielectric layer is increased utilizing an inhibitor. The inhibitor includes such inhibitors as a phosphoric acid, a carboxylic acid, an amino acid, or a hydroxyl group.
本公开涉及半导体装置的制造方法与蚀刻溶液。在图案化介电层(如高介电常数的栅极介电层)上的金属层(如p型金属功函数层)的湿蚀刻工艺中,可采用抑制剂以增加湿蚀刻溶液对金属层与对介电层之间的选择性。这些抑制剂可包括磷酸、羧酸、胺基酸、或羟基。 |
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本公开涉及半导体装置的制造方法与蚀刻溶液。在图案化介电层(如高介电常数的栅极介电层)上的金属层(如p型金属功函数层)的湿蚀刻工艺中,可采用抑制剂以增加湿蚀刻溶液对金属层与对介电层之间的选择性。这些抑制剂可包括磷酸、羧酸、胺基酸、或羟基。</description><language>chi ; eng</language><subject>ADHESIVES ; BASIC ELECTRIC ELEMENTS ; CHEMISTRY ; DYES ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FORELSEWHERE ; METALLURGY ; MISCELLANEOUS APPLICATIONS OF MATERIALS ; MISCELLANEOUS COMPOSITIONS ; NATURAL RESINS ; PAINTS ; POLISHES ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210720&DB=EPODOC&CC=CN&NR=113140509A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210720&DB=EPODOC&CC=CN&NR=113140509A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LIN QUNNENG</creatorcontrib><creatorcontrib>JIANG ZI'ANG</creatorcontrib><creatorcontrib>LIAN JIANZHOU</creatorcontrib><creatorcontrib>CHEN JIEWEI</creatorcontrib><creatorcontrib>YE MINGXI</creatorcontrib><title>Method for manufacturing semiconductor device and etching solution</title><description>The invention relates to a method for manufacturing a semiconductor device and an etching solution. In a wet etching process to pattern a metal layer such as a p-metal work function layer over a dielectric layer such as a high-k gate dielectric layer, a selectivity of the wet etching solution between the metal layer and the dielectric layer is increased utilizing an inhibitor. The inhibitor includes such inhibitors as a phosphoric acid, a carboxylic acid, an amino acid, or a hydroxyl group.
本公开涉及半导体装置的制造方法与蚀刻溶液。在图案化介电层(如高介电常数的栅极介电层)上的金属层(如p型金属功函数层)的湿蚀刻工艺中,可采用抑制剂以增加湿蚀刻溶液对金属层与对介电层之间的选择性。这些抑制剂可包括磷酸、羧酸、胺基酸、或羟基。</description><subject>ADHESIVES</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMISTRY</subject><subject>DYES</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FORELSEWHERE</subject><subject>METALLURGY</subject><subject>MISCELLANEOUS APPLICATIONS OF MATERIALS</subject><subject>MISCELLANEOUS COMPOSITIONS</subject><subject>NATURAL RESINS</subject><subject>PAINTS</subject><subject>POLISHES</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHDyTS3JyE9RSMsvUshNzCtNS0wuKS3KzEtXKE7NzUzOz0spTS4ByqWklmUmpyok5qUopJYkZ4AV5OeUlmTm5_EwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUknhnP0NDY0MTA1MDS0djYtQAAIP2MpY</recordid><startdate>20210720</startdate><enddate>20210720</enddate><creator>LIN QUNNENG</creator><creator>JIANG ZI'ANG</creator><creator>LIAN JIANZHOU</creator><creator>CHEN JIEWEI</creator><creator>YE MINGXI</creator><scope>EVB</scope></search><sort><creationdate>20210720</creationdate><title>Method for manufacturing semiconductor device and etching solution</title><author>LIN QUNNENG ; JIANG ZI'ANG ; LIAN JIANZHOU ; CHEN JIEWEI ; YE MINGXI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN113140509A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2021</creationdate><topic>ADHESIVES</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMISTRY</topic><topic>DYES</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FORELSEWHERE</topic><topic>METALLURGY</topic><topic>MISCELLANEOUS APPLICATIONS OF MATERIALS</topic><topic>MISCELLANEOUS COMPOSITIONS</topic><topic>NATURAL RESINS</topic><topic>PAINTS</topic><topic>POLISHES</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LIN QUNNENG</creatorcontrib><creatorcontrib>JIANG ZI'ANG</creatorcontrib><creatorcontrib>LIAN JIANZHOU</creatorcontrib><creatorcontrib>CHEN JIEWEI</creatorcontrib><creatorcontrib>YE MINGXI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LIN QUNNENG</au><au>JIANG ZI'ANG</au><au>LIAN JIANZHOU</au><au>CHEN JIEWEI</au><au>YE MINGXI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for manufacturing semiconductor device and etching solution</title><date>2021-07-20</date><risdate>2021</risdate><abstract>The invention relates to a method for manufacturing a semiconductor device and an etching solution. In a wet etching process to pattern a metal layer such as a p-metal work function layer over a dielectric layer such as a high-k gate dielectric layer, a selectivity of the wet etching solution between the metal layer and the dielectric layer is increased utilizing an inhibitor. The inhibitor includes such inhibitors as a phosphoric acid, a carboxylic acid, an amino acid, or a hydroxyl group.
本公开涉及半导体装置的制造方法与蚀刻溶液。在图案化介电层(如高介电常数的栅极介电层)上的金属层(如p型金属功函数层)的湿蚀刻工艺中,可采用抑制剂以增加湿蚀刻溶液对金属层与对介电层之间的选择性。这些抑制剂可包括磷酸、羧酸、胺基酸、或羟基。</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ADHESIVES BASIC ELECTRIC ELEMENTS CHEMISTRY DYES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FORELSEWHERE METALLURGY MISCELLANEOUS APPLICATIONS OF MATERIALS MISCELLANEOUS COMPOSITIONS NATURAL RESINS PAINTS POLISHES SEMICONDUCTOR DEVICES |
title | Method for manufacturing semiconductor device and etching solution |
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