Integrated circuit device and method of forming same
A transistor includes a gate structure having a first gate dielectric layer and a second gate dielectric layer. A first gate dielectric layer is disposed over the substrate. The first gate dielectric layer includes a dielectric material of a first type having a first dielectric constant. A second ga...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A transistor includes a gate structure having a first gate dielectric layer and a second gate dielectric layer. A first gate dielectric layer is disposed over the substrate. The first gate dielectric layer includes a dielectric material of a first type having a first dielectric constant. A second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer includes a dielectric material of a second type having a second dielectric constant. The second permittivity is greater than the first permittivity. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide. The embodiment of the invention also relates to a semiconductor device and a forming method thereof.
一种晶体管包括具有第一栅极介电层和第二栅极介电层的栅极结构。第一栅极介电层设置在衬底上方。第一栅极介电层包含具有第一介电常数的第一类型的介电材料。第二栅极介电层设置在第一栅极介电层上方。第二栅极介电层包含具有第二介电常数的第二类型的介电材料。第二介电常数大于第一介电常数。第一介电常数和第二介电常数各自大于氧化硅的介电常数。本发明的实施例还涉及半导体器件及其形成方法。 |
---|