Data latch circuit structure suitable for large-bit-width CAM

The invention provides a data latch circuit structure diagram suitable for a large-bit-width CAM. A latch pulse signal generated by a self-timing circuit in the CAM is matched with a set of latches of a data port, so that a latching function of large-bit-width CAM port data is completed; when the latch circuit structure is used for data latching of the large-bit-width CAM, pulse signals of the latch are generated on the basis of an external clock. In the CAM read-write process, the read-write cycle is adjusted according to feedback of the storage array to the equal load, so that the read-write time requirement is met, the read-write cycle can be minimized, and the speed of a CAM circuit is fully exerted; for the large-bit-width CAM data port, a large number of latches are used for replacing a trigger, so that the load of an external clock is reduced. 本发明提供了一种适用于大位宽CAM的数据锁存电路结构图，通过采用CAM内部自定时电路产生的锁存脉冲信号配合数据端口的一套锁存器，完成对大位宽CAM端口数据的锁存功能，在使用锁存电路结构进行大位宽CAM的数据锁存时，锁存器的脉冲信号的产生以外部时钟为基础，CAM读写过程中，读写周期根据存储阵列对等负载的反馈进行调整，这样即