Binary tree-based pseudo LRU hardware structure, update logic and Cache replacement method

The invention provides a binary tree-based pseudo LRU hardware structure, update logic and a Cache replacement method. The binary tree-based pseudo LRU hardware structure comprises a binary tree structure defined based on n-path group associative Cache and reuse information defined based on each Cache block; when a program accesses a certain Cache block, Cache block reuse information is updated, and node bits corresponding to the Cache block in the binary tree are updated based on the reuse information and the access information; behaviors of the Cache replacement method can be intervened through software, the Cache hit rate can be effectively increased for applications such as artificial intelligence, and the program memory access overhead is reduced; meanwhile, a user interface for intervening in a hardware replacement method is provided for software, a processor instruction set and a compiler do not need to be modified at all, and the application range is wide. 本发明提供一种基于二叉树的伪LRU硬件结构、更新逻辑和对Cache的替换方法，包括：基于n