Semiconductor layout structure and designing method thereof

The invention discloses a semiconductor layout structure and a designing method thereof, and the semiconductor layout structure comprises a substrate, and a first cell pattern and a second cell pattern which are disposed on the substrate. A plurality of first active features are disposed within the first cell pattern, including a first channel length and spaced apart from each other by a polysilicon spacing. A plurality of second active features are disposed within the second cell pattern, including a second channel length and spaced apart from each other by the polysilicon spacing. The first channel length differs from the second channel length by a variable, and a first cell width of the first cell pattern and a second cell width of the second cell pattern are integer multiples of the polysilicon spacing. 本发明公开一种半导体布局结构及其设计方法，其中该半导体布局结构，包括一基底、设置于该基底上的一第一元件图案以及一第二元件图案。多个第一主动特征设置在该第一元件图案内，包括一第一通道长度且彼此相隔一多晶硅间隔。多个第二主动特征设置在该第二元件图案内，包括一第二通道长度且彼此相隔该多晶硅间隔。该第一通道长度与该第二通道长度相差一变数，且该第一元件图案的一第一元件宽度以及该第二元件图案的一第二元件宽度是该多晶硅间