FPGA-based chopping period variable hardware current loop control system and method

The invention discloses an FPGA-based chopping period variable hardware current loop control system and method. The system comprises a time sequence control module, an encoder acquisition control module, an electrical angle calculation module, a sine and cosine calculation module, a parallel bus communication module, a Clark conversion module, a park conversion module, a PI regulator module, an ipark conversion module, an SVPWM operation module and a PWM output module. An FPGA chip is used as a controller of a hardware current loop, so that the calculation period of the current loop is greatly shortened, and the bandwidth of an inner loop and the response capability of the system are improved; through the design of the time sequence control module, each step of calculation is in a determined time point, the controllability is high, and the accuracy is high; an FPGA is adopted to interrupt an external processor, so that the synchronism of the system is ensured; and meanwhile, a time division multiplexing mode