Method for positioning test vector with test failure

The invention provides a method for positioning a test vector with test failure, which comprises the following steps of: dividing a test vector set into a plurality of logic segments, adding a virtual flag bit vector in front of a part of logic segments, and taking a first test vector behind the virtual flag bit vector as an initial test vector; loading the test vector of the logic segment with the virtual flag bit vector to the to-be-tested device to complete a test, and displaying a test result in a bitmap; and calculating the address of the test vector with the failed test result in the logic segment in the test vector set through the position of the initial test vector. According to the method, the address of the test vector with the invalid test result in the test vector set in the logic segment is calculated according to the position of the initial test vector after the virtual flag bit, so that the position of the invalid test vector in the test vector set is positioned, and the debugging work can be e