Semiconductor memory and manufacturing method thereof
The invention provides a semiconductor memory and a manufacturing method thereof. The semiconductor memory comprises a capacitor array and a supporting layer which are located on a substrate, wherein a lower electrode in each capacitor is connected with at least one adjacent lower electrode through...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a semiconductor memory and a manufacturing method thereof. The semiconductor memory comprises a capacitor array and a supporting layer which are located on a substrate, wherein a lower electrode in each capacitor is connected with at least one adjacent lower electrode through the supporting layer, the supporting layer is not arranged between the supporting layer and the at least one adjacent lower electrode, the capacitor array is divided into a core array region and a virtual array region, and the virtual array region is located between the core array region and the virtual array region; the virtual array region surrounds the core array region; the core array region is divided into a first support layer region and a first region complementary with the first support layer region except the region where the lower electrode is arranged; the area, except the area where the lower electrode is arranged, in the virtual array region is divided into a second supporting layer region and a second |
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