Semiconductor structure and forming method thereof

The present disclosure is directed to a semiconductor structure having a source/drain epitaxial stack having a low melting point top layer and a high melting point bottom layer. For example, the semiconductor structure includes a gate structure disposed on the fin and a recess formed in a portion of the fin that is not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, wherein the source/drain epitaxial stack has a bottom layer and a top layer, the top layer having a higher activated dopant concentration than the bottom layer. The embodiment of the invention also provides a method for forming the semiconductor structure. 本发明针对具有源极/漏极外延堆叠件的半导体结构，该源极/漏极外延堆叠件具有低熔点顶层和高熔点底层。例如，半导体结构包括设置在鳍上的栅极结构和形成在鳍的未由栅极结构覆盖的部分中的凹槽。此外，半导体结构包括设置在凹槽中的源极/漏极外延堆叠件，其中源极/漏极外延堆叠件具有底层和顶层，该顶层具有比底层高的激活的掺杂剂浓度。本发明的实施例还提供了形成半导体结构的方法。