SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MAKING
Disclosed are a semiconductor arrangement and a method for making. The semiconductor arrangement includes a first dielectric feature passing through a semiconductive layer and a first dielectric layer over a substrate. The semiconductor arrangement includes a conductive feature passing through the s...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | Disclosed are a semiconductor arrangement and a method for making. The semiconductor arrangement includes a first dielectric feature passing through a semiconductive layer and a first dielectric layer over a substrate. The semiconductor arrangement includes a conductive feature passing through the semiconductive layer and the first dielectric layer and electrically coupled to the substrate. The conductive feature is adjacent the first dielectric feature and electrically isolated from the semiconductive layer by the first dielectric feature.
一种半导体布置及其形成方法,半导体布置包括穿过半导电层及在基板之上的第一介电层的第一介电特征。半导体布置包括穿过半导电层及第一介电层且电耦接至基板的导电特征。导电特征与第一介电特征相邻且通过第一介电特征与半导电层电隔离。 |
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