Multi-chip package and manufacturing method thereof

The invention discloses a multi-chip package and a manufacturing method thereof. The multi-chip package includes: an interposer including a wiring structure and an interposer via electrically connected to the wiring structure; a plurality of semiconductor chips located on a first surface of the interposer and electrically connected to each other through the interposer; an encapsulant located on the first surface of the interposer and encapsulating at least a portion of the plurality of semiconductor chips; and a redistribution circuit structure located on a second surface of the interposer opposite to the first surface, wherein the plurality of semiconductor chips are electrically connected to the redistribution circuit structure through at least the interposer. 本发明公开一种多芯片封装件及其制造方法。多芯片封装件包括：中介层，包括布线结构与电连接至布线结构的中介通路；多个半导体芯片，位于中介层的第一表面上且经由中介层而彼此电连接；包封体，位于中介层的第一表面上且包封多个半导体芯片的至少部分；以及重配置线路结构，位于中介层的与第一表面相对的第二表面上，其中所述多个半导体芯片至少经由所述中介层而电连接至所述重配置线路结构。