METHODS OF HARDWARE AND SOFTWARE COORDINATED OPT-IN TO ADVANCED FEATURES ON HETERO ISA PLATFORMS

The invention discloses methods of hardware and software coordinated opt-in to advanced features on hetero ISA platforms. The present disclosure relates to a processor that includes one or more processing elements associated with one or more instruction set architectures. The processor is configured to receive a request from an application executed by a first processing element of the one or moreprocessing elements to enable a feature associated with an instruction set architecture. Additionally, the processor is configured to enable the application to utilize the feature without a system call occurring when the feature is associated with an instruction set architecture associated with the first processing element. 本申请公开了异构ISA平台上硬件和软件协调的对高级特征选入的方法。本公开涉及一种处理器，该处理器包括与一个或多个指令集架构相关联的一个或多个处理元件。处理器被配置成用于从由一个或多个处理元件中的第一处理元件执行的应用接收启用与指令集架构相关联的特征的请求。另外，处理器被配置成用于在特征与同第一处理元件相关联的指令集架构相关联时，使得应用能够在不发生系统调用的情况下利用该特征。