Foreground time error correction circuit of multi-channel time domain interleaved data converter

The invention discloses a foreground time error correction circuit of a multi-channel time domain interleaved data converter, which is characterized in that a down-sampling channel data extraction circuit can reduce a signal transmission rate to a channel sampling rate, extracts data and uses a zero crossing point detection circuit to determine whether zero crossing points exist between every twoadjacent channel conversion data or not; a pre-normalization circuit can remove a non-difference part between channels and leave difference information between the channels as time error information between the channels; error information is converged to a channel time error value through an accumulator and a step length adjusting circuit, and then an original conversion signal containing a channel time error is corrected through a Taylor first-order expansion correction circuit. A mean square error detection circuit is added in the structure to determine whether the circuit is converged to reliable precision or not.