Data reading circuit based on balanced pre-charging and group decoding

The invention discloses a data reading circuit based on balanced pre-charging and group decoding, which utilizes a balance transistor in a pre-charging circuit to balance a bit line voltage after reading operation again through a control signal, and takes the voltage balanced again as an initial voltage for next reading. And the gradually reduced bit line voltage improves the stability of the unitand reduces the occurrence rate of read errors. And in combination with the decoding mode of group decoding, continuous reading of data in the array is realized. 本发明公开了一种基于平衡预充与组译码的数据读取电路，通过控制信号，利用预充电路中的平衡晶体管将读取操作后的位线电压再次平衡，将再次平衡的电压作为下次读取时的初始电压。逐渐降低的位线电压提高了单元的稳定性，降低了读错误发生率。并且结合组译码这种译码方式，实现了阵列中数据的连续读取。