METHODS AND SYSTEMS FOR SERIAL MEMORY DEVICE CONTROL

Aspects of the present disclosure relate to systems and methods for determining a busy/ready state of a serial memory device. A method includes a memory controller (104) enabling a serial memory device (serial peripheral interphase, SPI, NAND, 110) changing a value of the chip selecting signal (CS#) from a first value to a second value; the memory controller (104) enabling a clock signal (SCLK) based on changing the value of the chip selecting signal (CS#) from the first value to the second value; the memory controller (104) receiving a flag from the serial memory device (110) indicating a state of the serial memory device (110) based on the enabling of the serial memory device (110) using the chip selecting signal (CS#), wherein the serial memory device (110) is configured to send the flag via a slave output signal (SO) at the same clock cycle of the clock signal (SCLK) that the chip selecting signal (CS#) changes from the first value to the second value. 本公开的各个方面涉及用于确定串行存储器设备的繁忙/就绪状态的系统和方法。一种方法包括：存储器控制器(104