PROGRAMMABLE RECEIVERS INCLUDING A DELTA-SIGMA MODULATOR

Various embodiments relate to an analog-to-digital converter (ADC). The ADC may include a first channel including a first delta-sigma loop filter and a second channel including a second delta-sigma loop filter. Each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first integrator and a quantizer having an input coupled to an output of the first integrator.Each of the first delta-sigma loop filter and the second delta-sigma loop filter may also include a first summing node having an output coupled to an input of the first integrator, and a feedforwardpath from an input of the delta-sigma loop filter to a first input of the first summing node. Further, each of the first delta-sigma loop filter and the second delta-sigma loop filter may include a first feedback path from an output of the quantizer to a second input of the first summing node. 本发明的各种实施方案涉及模数转换器(ADC)。ADC可包括第一通道和第二通道，该第一通道包括第一Δ-Σ回路滤波器，该第二通道包括第二Δ-Σ回路滤波器。第一Δ-Σ回路滤波器和第二Δ-Σ回路滤波器中的每一者可包括第一积分器和量化器，该量化器具有耦接到第一积分器的输出