Method for improving clock phase measurement precision
The invention discloses a method for improving clock phase measurement precision, which comprises the following steps of: phase translation is performed on a clock through a phase shift technology toobtain a new clock phase and the frequency is unchanged; for phase discrimination pulse, rising edge...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The invention discloses a method for improving clock phase measurement precision, which comprises the following steps of: phase translation is performed on a clock through a phase shift technology toobtain a new clock phase and the frequency is unchanged; for phase discrimination pulse, rising edge triggering and falling edge triggering can be selected at the same time; phase translation can be realized by using a special phase shifter. The method for improving the clock phase measurement precision can also be realized through an FPGA or a CPLD, the measurement precision can be improved by more than 8 times under the condition of not changing the phase discrimination frequency in the device, and the clock is subjected to phase translation through a phase shift technology, so that the measurement gap is refined, and the test precision is improved; meanwhile, the principle of simultaneous triggering of the rising edge and the falling edge is adopted, the measurement precision is doubled, and the measurement pre |
---|