Converter valve trigger architecture for realizing live-line fault processing

The invention relates to a converter valve trigger architecture for realizing live-line fault processing. The architecture comprises a thyristor electronic board in signal connection with a convertervalve, and the thyristor electronic board is located in a valve hall; and the architecture further comprises a VBE main system and a VBE standby system. The VBE main system and the VBE standby systemare located in a control protection chamber. The VBE main system and the VBE standby system are respectively provided with a first light-emitting plate and a second light-emitting plate; the thyristorelectronic board is connected with an MSC module of an optical fiber coupler, a main optical fiber, a standby optical fiber and a preset optical fiber are preset at an inlet of the MSC module, the main optical fiber is connected with the first light-emitting board, the standby optical fiber is connected with the second light-emitting board, and the end, away from the MSC module, of the preset optical fiber is located in th