Sidewall Passivation for HEMT Devices

Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a...

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Bibliographische Detailangaben
Hauptverfasser: QIU HANQIN, CHEN QIMING, CAI ZHENGYUAN, YAO FUWEI
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a binary III/V semiconductor layer made of a first III-nitride material to act as a channel region of the e-HEMT, and a ternary III/V semiconductor layer arranged over the binary III/V semiconductor layer and made of a second III-nitride material to act as a barrier layer. Source and drain regions are arranged over the ternary III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. Afirst passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material. The embodiment of the invention also relates to sidewall passivation for HEMT devices. 本发明的一些实施例涉及包括布置在半导