Three-dimensional multi-chip parallel packaging structure

The invention discloses a three-dimensional multi-chip parallel structure. The invention relates to the technical field of semiconductor devices, in particular to a semiconductor device with a multi-diode chip parallel structure. The three-dimensional multi-chip parallel structure provided by the invention increases the overcurrent capacity of a device without increasing the area occupied by installation of the device. The structure comprises a frame, chips and jumper wires. The structure is characterized in that the frame comprises a frame A and a frame B; a chip layer 1, a chip layer 2, ...,a chip layer n are sequentially stacked on the frame B from bottom to top, and n is greater than or equal to 2; the polarities of the opposite faces of the adjacent chip layers are consistent; the sum of the jumper wires Ak and the jumper wires Bj is consistent with the number of the chip layers; and n is a number sequence number. According to the invention, plane spreading of multiple chips is changed into three-dimensi