Preparation method of SOI-based p-GaN enhanced GaN power switch device

The invention relates to a preparation method of an SOI-based p-GaN enhanced GaN power switch device. The preparation method comprises the following steps of growing a gate medium; growing a gate metal; etching to manufacture a gate electrode; growing a first passivation layer; forming the ohmic contact in source and drain regions; carrying out ion implantation; growing a second passivation layer;opening a source-drain window; and carrying out the first deep groove etching and second deep groove etching operations. According to the method, the device controllability and stability advantages brought by p-GaN and the device monolithic isolation advantages brought by SOI are helpful for realizing a GaN monolithic integrated half-bridge circuit, the areas of parasitic inductance and die are greatly reduced, and the integration and miniaturization of a power switching device are promoted. 本发明涉及一种SOI基p-GaN增强型GaN功率开关器件的制备方法，包括：栅介质生长；栅金属生长；刻蚀以制作栅电极；生长第一层钝化层；源漏区欧姆接触；离子注入；生长第二层钝化层；打开源漏窗口；第一深槽刻蚀，第二深槽刻蚀。该方法中p-GaN带来的器件可控性